Fpga Based Wireless Universal Digital Automated Test Equipment

Fpga Auto Configuration Based on Automated Test Equipment

FPGAs (Field Programmable Gate Arrays) are highly integrated devices that can be programmed into variable functions. The application-level testing of FPGAs usually requires multiple reconfigurations and relevant functional tests respectively through ATEs (Automated Test Equipments). However, test engineers are facing a tough problem to re-configure FPGAs automatically by an ATE instead of inter...

FPGA Implementation of a Hammerstein Based Digital Predistorter for Linearizing RF Power Amplifiers with Memory Effects

Power amplifiers (PAs) are inherently nonlinear elements and digital predistortion is a highly cost-effective approach to linearize them. Although most existing architectures assume that the PA has a memoryless nonlinearity, memory effects of the PAs in many applications ,such as wideband code-division multiple access (WCDMA) or orthogonal frequency-division multiplexing (OFDM), can no longer b...

FPGA based chip emulation system for test development of analog and mixed signal circuits: A case study of DC–DC buck converter

Prototyping on FPGA has become a main stream verification methodology for hardware design, test development, software co-design, etc. in the area of digital VLSI. In the case of test development, FPGA serves as a virtual DUT (Design Under Test) and test patters are applied from automatic test equipment (ATE). This verifies not only the chip with design for test (DFT) circuitry and test program ...

FPGA-based of Thermogram Enhancement Algorithm for Non-destructive Thermal Characterization

MIMO Hardware Simulator: Algorithm Design for Heterogeneous Environments

A wireless communication system can be tested either in actual conditions or by a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel and making it possible to test “on table” mobile radio equipment. This paper presents an architecture for the digital block of a hardware simulator of MIMO propagation cha...